Tagged Questions
21
votes
1answer
448 views
Performance of single-assignment ADT oriented code on modern CPUs
Working in immutable data with single assignments has the obvious effect of requiring more memory, one would presume, because you're constantly creating new values (though compilers under the covers ...
13
votes
2answers
3k views
Why are there separate L1 caches for data and instructions?
Just went over some slides and noticed that the L1 cache (at least on Intel CPUs) distinguishes between data and instruction cache, I would like to know why this is..
