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79

Every processor I've worked on does comparison by subtracting one of the operands from the other, discarding the result and leaving the processor's flags (zero, negative, etc.) alone. Because subtraction is done as a single operation, the contents of the operands don't matter. The best way to answer the question for sure is to compile your code into ...


51

If cooling is insufficient, the CPU might overheat. But they all (well, at least all modern PC CPUs) feature various thermal protection mechanisms which will throttle the clock speed or, as a final resort, shut down. So yes, on a dusty laptop, 100 % CPU load could cause temporary problems, but nothing will break or "degrade" (whatever that means). For CPU ...


47

If the code says A = A + 1 compiled code does this add A, 1 interpreted code does this (or some variation) look up the location of A in the symbol table find the value of A see that 1 is a constant get its value add the value of A and the value of 1 look up the location of A in the symbol table store the new value of A get the idea?


45

It may be possible to do this "by accident" with careless use of core affinity. Consider the following pseudocode: start a thread in that thread, find out which core it is running on set its CPU affinity to that core start doing something computationally intensive / loop forever If you start four of those on a two-core CPU, then either something goes ...


43

They're not quite the same. The registers are the places where the values that the CPU is actually working on are located. The CPU design is such that it is only able to actually modify or otherwise act on a value when it is in a register. So registers can work logic, whereas memory (including cache) can only hold values the CPU reads from and writes to. ...


34

It could be necessary to have 4 cores because the application runs four tasks in parallel threads and expects them to finish almost simultaneously. When every thread is executed by a separate core and all threads have the exact same computational workload, they are quite likely (but far from guaranteed) to finish roughly the same time. But when two threads ...


24

Is there a difference in performance on the ALU level in comparisons between very large numbers vs very small ones? It's very unlikely, unless going from a small number to a large number changes your numeric type, say from an int to a long. Even then, the difference might not be significant. You're more likely to see a difference if your programming ...


20

CPU (its memory controller specifically) can take advantage of the fact that the memory is not mutated Advantage is, this fact saves compiler from using membar instructions when data is accessed. A memory barrier, also known as a membar, memory fence or fence instruction, is a type of barrier instruction which causes a central processing unit (CPU) ...


20

This multiplication algorithm does not replace multiplication with addition. Instead, it splits the multiplication into a number of smaller multiplications that are easier for humans to understand. Humans (unlike computers) deal well with patterns and symbols, less so with large numbers (where “large“ means “multiple digits”). 321 × 254 × | 2E2 + 5E1 + ...


19

Executables do depend on both the OS and the CPU: Instruction Set: The binary instructions in the executable are decoded by the CPU according to some instruction set. Most consumer CPUs support the x86 (“32bit”) and/or AMD64 (“64bit”) instruction sets. A program can be compiled for either of these instruction sets, but not both. There are extensions to ...


18

However, with all of these new systems, it seems as if GPUs are better than CPUs in every way. This is a fundamental mis-understanding. Present GPU cores are still limited compared to current top-line CPUs. I think NVIDIA's Fermi architecture is the most powerful GPU currently available. It has only 32-bit registers for integer arithmetic, and less ...


18

Many processors have "small" instructions which can perform arithmetic operations, including comparisons, on certain immediately-specified operands. Operands other than those special values must either use a larger instruction format or, in some cases, must use a "load value from memory" instruction. In the ARM Cortex-M3 instruction set, for example, there ...


17

No, instruction sets aren't "standardized" in a way that you could produce assembly that's fit for – or is simply mappable to – ARM, x86, PPC, MIPS, Itanium, Sparc, ... (and their variants). Native code compilers are pretty complex beasts. Not all the work they do is processor-specific. All the lexing/parsing is language-dependent but not ...


15

There are actually several reasons. First and probably foremost, the data that's stored in the instruction cache is generally somewhat different than what's stored in the data cache -- along with the instructions themselves, there are annotations for things like where the next instruction starts, to help out the decoders. Some processors (E.g., Netburst, ...


15

I believe it comes from the very early days of computing, when memory was very limited, and it was not wise to pre-allocate a large chunk of memory for exclusive use by the stack. So, by allocating heap memory from address zero upwards, and stack memory from the end of the memory downwards, you could have both the heap and the stack share the same area of ...


15

Intel had 5 pipeline stages in its original Pentium architecture. The number of stages peaked at 31 in the Prescott family, but decreased after that. Today, in the Core series II processors (i3, i5, and i7), there are 14 stages in the processor pipeline. Microarchitecture Pipeline stages P5 (Pentium) 5 P6 (Pentium 3) 10 P6 (Pentium ...


15

It is unlikely that these "minimum requirements" represent something below which the game will not run. Far more likely is that they represent something below which the game will not run with acceptable performance. No game company wants to deal with lots of customers complaining about crappy performance when they are running it on a single core 1 Ghz box, ...


14

The best answer I can think of is something I've seen repeated over and over: Don't prematurely optimize. The longer version of that is: The compiler (presumably) knows much more about the target architecture than you do. You should write your code to be correct and maintainable, if the underlying hardware changes, you don't want to have your code too ...


14

Windows programs (winforms/WPF) should at all times stay responsive. With a naive implementation of a process that uses 100% cpu resources it's all too easy to make your program or even your system seem sluggish and hanging. With a good implementation (for instance: use a seperate thread with lower priority) it shouldn't be a problem. You shouldn't worry ...


14

There is generally nothing wrong with a program using 100% CPU while it is actually doing useful work and is not taking time away from anything more important. If a particular hardware platform is e.g. only capable of using 100% CPU continuously for one second before it has to throttle back to 50% to avoid overheating, it is generally better for an ...


13

we wanted it to be compiled so it’s not burning CPU doing the wrong stuff. Sounds like they are referring to compiled vs interpreted. Most likely down to the whole story of Twitter moving background processing tasks to Scala (compiled) after initially developing in Ruby On Rails (interpreted). An explanation of compiled vs interpreted code here. ...


13

Unsurprisingly, you are indeed "doomed from the start". This "Japanese Multiplication" (which is a visual form of the grid method tought in UK primary schools since the 1990s) has a time complexity of at least O(n^2) where n is the number of digits in the numbers you are multiplying. This is because the number of intersections will be n*n, and you have to ...


12

The lines of code have nothing to do with how the CPU executes it. I'd recommend reading up on assembler, because that will teach you a lot about how the hardware actually does things. You can also get assembler output from many compilers. That code might compile into something like (in a made up assembly language): load R1, [x] ; meaning load the data ...


12

I wouldn't say it was the first. Core War at least has been around since 1984. Core War (or Core Wars) is a programming game in which two or more battle programs (called "warriors") compete for the control of the "Memory Array Redcode Simulator" virtual computer ("MARS"). These battle programs are written in an abstract assembly language called Redcode. At ...


11

If you're talking about the difference between: if (isTodayAHoliday(now) > 0) { ... } And: int holiday = isTodayAHoliday(now); if (holiday > 0) { ... } Then the answer is simple: there is absolutely no difference in the machine code. Remember that the CPU knows nothing about functions or expressions. The branch instruction doesn't take a ...


11

Yes, there is a Data Acknowledge signal. It asserts that the data has been placed onto the memory bus, and is available to the processor for reading. Briefly, the memory read cycle works like this: The processor initiates a read bus cycle by floating the address of the memory location on the address lines. Once the address lines are stable, the processor ...


10

Real/Actual errors in a CPU's design aside, I think you are looking for this SO Question: Cosmic Rays. What is the probability they will affect a program. I can't get quotes from it because SO is blocked again at work here (sigh). Ignoring the above, I seem to recall there was some FPU calculation bugs in early Pentiums, so they certainly are not ...


10

Yes, your P4 desktop will be hugely faster than a cell phone. I used to work on a cell phone OS. This was a few years ago, and we were using XScale and OMAP ARM CPUs, and we also had a desktop simulator that ran the same code compiled for x86. I never measured it, but 27x is certainly plausible. There are a ton of factors involved other than raw CPU clock ...


10

GPUs aren't generalist processors the way CPUs are. They specialize in doing one very specific thing--applying the same code to a large amount of data--and they do it very, very well, much better than a CPU does. But the majority of most applications is not about applying the same code to a large amount of data; it's about an event loop: waiting for input, ...


9

Three realtime threads that never sleep and one other thread. If there are less than four cores, the fourth thread never runs. If the fourth thread needs to communicate with one of the realtime threads for the realtime thread to finish, the code will not finish with less than four cores. Obviously if realtime threads are waiting on something that doesn't ...



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